HPC architectures, race to exascale, rankings, vendors, exascale software

HPC Rankings & Benchmarks:

Linpack, exascale & the Top500    LINPACK's 'companion metric' gains traction

June 2020 Topo500 list    Top500 list November 2019    Shadow over June 2019 Top500 list         

June 2020 Green500 list    Top500 and Green500 merge    The Green500 List Nov 2019

The Graph500  BFS List June 2019    The Graph 500 SSSP List June 2019    

HPC Challenge Benchmark Nov 2018

HPCG Nov 2019 

Controversy around ranking lists:

Too big to FLOP?

HPC Lists we'd like to see

Top problems with the TOP500

TOP500: the missing puzzle pieces

Focus sharpens on new HPC benchmark

Preparing AI benchmarks for HPC machines

A conversation with ISC Fellow Jack Dongarra

New HPC benchmark delivers promising results

How do you measure a supercomputer's speed?

SPEC releases major new CPU benchmark suite

Sandia-developed benchmark re-ranks top computers

Council on Competitiveness defends TOP500 usefulness    

TOP500 reanalysis shows 'nothing wrong with Moore's Law'

Architectual surprises underpin new HPC benchmark results

Cluster numbers: an automated benchmarking tool for HPC clusters

STREAM benchmark author McCalpin traces system balance trends

Supercomputer slowdown: world's fastest system sees no challengers

Toward a new metric for ranking high performance computing systems

Towards Exascale:

Fugaku keeps crown, Nvidia's Selene climbs to #5

How can 18 zeros chnage the world?

Facing the future

Petaflop in a box

Exascale computing

IT in the next decade

The national HPC race

The exascale revolution

On the road to exascale  

The bumpy road to exascale

Will we ever reach zettaflops?

Future challenges within HPC

HPC architecture in the 2020's

How cool are supercomputers?

Paving the roadmap to exascale

Supercomputers let up on speed

Working towards higher performance

Exascale: a race to the future of HPC

Trends in High-Performance Computing

HPC evolves from the commodity cluster

Taking a disruptive approach to exascale

What's the true hourly cost of outsourcing

Pondering the future of HPC architectures

Preparing for exascale science on day one

Will the real exascale race please stand up

Engineering codes to meet the exascale era

End-users need to design exascale computers

Exascale computing: the space race of our time

MPI milestone achieved on the path to exascale

Exascale research: preparing for the post-Moore era 

HPC iron, soft, data, peaople - it takes an ecosystem

Gordon Bell reflects on race to build fastest computer

ExaNeSt: 10M computers into a single supercomputer

Doug Kothe on the race to build exascale applications

Toward a converged exascale-big data software stack

The exascale computing race isn't about bragging rights

A new generation of smarter, not faster, supercomputers

Exascale processor proliferation? How many is too many?

Moving just to exascale or preparing for sustained scaling

Leap to the extreme scale could break science boundaries

HPC programming in the age of multicore: one man's view

IEEE members on suoercomputing predictions, challenges

IEEE conference keynoters lay out path to exascale computing

Can our computers continue to get smaller and more powerful?

Extreme-scale requirements to push the frontiers of deep learning

The accelerator wall: a new problem for a post-Moore's Law world

Solving the Sky: new computers resolve clouds while keeping cool

Trends in HPC and machine learning drive evolution of cooling solutions

World-leading HPC centers partner to form accelerated computing institute

Advancing modular supercomputing with DEEP and DEEP-ER architectures

Analysis of the characteristics and development trends of next-gen supercomputers (outside of Japan)

Improving energy efficiency and exploiting parallelism with Processor-in-Memory/Near-Data Processing

The Power Wall:

Powering up exascale

Energy-efficient supercomputing

Exascale: power Is not the problem!

Charming exascale power problems

Follow the green brick road to exascale

Tackling power and resiience at exascale

A path to energy efficient HPC data center

How can supercomputers survive a drought?

The path to an energy-efficient exascale supercomputer

Tackling the power and energy wall for future HPC systems

Number crunching, data crunching and energy efficiency: the HPC hat trick

UCLA engineers develop new energy-efficient computer memory using magnetic materials

Japan exascale:

Fujitsu presents post-K CPU specs

Report on the Fujitsu Fugaku system

Japan's post-K computer hits 1-2 year speed bump

Inside Japan's future exascale ARM supercomputer

Post-K supercomputer named after Japan's tallest peak

New Japanese supercomputing project targets exascale

K computer leads Graph500 ranking for ninth consecutive time

Riken's Dr. Yutaka Ishikawa tells the Fugaku development story

Fujitsu achieves over 1,000 petaflops on new HPL-AI benchmark 

China exascale: 

China flexes high-tech muscles     

China maintains lead in race to exascale

China mulls national CPU architecture spec

China makes its own supercomputing cores

China could become supercomputing partner

China's expanding efforts to win in microchips

China's dark horse supercomputing chip: FeiTeng

China preps Godson chip for supercomputing duty 

China wins new bragging rights in supercomputers

Sugon announces roadmap to exascale computing

China sets ambitious goal to reach exascale by 2020

China reports breakthrough in developing 3nm transistors

China establishes seventh National Supercomputing Center

India exascale:

India plots 3-ohase indigenous supercomputing starategy

US exascale:

Frontier - direction of discovery

US DoE exascale ECP program update

DoE to fund exascale resilience research

DOE commissions extreme computing study

Exascale computing - the view from Argonne

DOE exascale plan gets support with caveats

DOE primes pump for exascale supercomputers

Argonne's Peter Beckman on the race to exascale

The vital importance of HPC to US competitiveness

US moves exascale goalposts, targets 2021 delivery

IBM promises a 200 Petaflop supercomputer by 2018

US supercomputing leaders tackle the China question

Summit achieves 445 petaflops on new 'HPL-AI' benchmark

Top scientist urges 'ambitious' U.S. exascale supercomputer plan 

Six exascale PathForward vendors selected: DoE providing $258M

US Exascale Computing Project releases software technology project report

New US national HPC strategy is bold, important and more daunting than the US moonshot

Europe exascale:

Exascale in Europe

PRACE Supercomuting MOOC

Latest ARM-HPC developments

HPC: A key technology for Europe

Europe's efforts to control its HPC destiny

EU funds 20M euro ARM + FPGA exascale project

European consortium to develop exascale architecture

Ecosystem for future European exascale supercomputer

European Project Will Design Energy-Efficient Exascale Machine

EU projects unite on heterogenous ARM-based exascale prototype    

HPC CPU Chip Vendors:

Intel:

Intel: the future of HPC has arrived

Cray Chapel new computing language

Intel will ship Knights Corner chip in 2012

Intel adds new dimension to transistor making

Intel Skylake: Xeon goes from chip to platform

Intel fires the next salvo in supercomputer battle

Intel launches Cascade Lake Xeons with up to 56 cores

Intel brings manycore X86 to market with Knights Corner 

Intel Atom architecture in a handheld form factor: Medfield

Intel and Cray to build the next generation US supercomputer

Momentum builds for Intel's HPC scalable system framework

Intel scales up cores and memory with new Westmere EX CPUs

Intel unveils 72-core X86 Knights Landing CPU for exascale computing

Intel Xeon E5 debuts on TOP500; first Intel MIC co-processor hits 1 teraflop

AMD:

AMD: The Integration Revolution

AMD's exscale strategy hinges on heterogeneity

AMD refreshes roadmap, transitions back to HPC

AMD expands exascale vision at IEEE HPC symposium

GlobalFoundaries: 7 nm chips coming in 2018, EUV in 2019

ARM:

Enabling the ARM ecosysteem for HPC

Bolstering the ARM case for HPC workloads

ARM processors set to challenge x86 on Its own turf 

ARM discloses technical details of 64-bit architecture

ARM unveils Neoverse N1 platform with up to 128-cores

Russia launches ARM chip effort to end X86 dependence

Migrating high performance applications to the ARM 8 architecture

Arm Yourselves for Exascale, Part 1   Arm yourselves for Exascale, Part 2

Qualcomm:

Qualcomm takes first step in uphill battle  with Intel over server market

Qualcomm targets Intel datacenter dominance with 10nm ARM-based server chip

Adepteva:

Adapteva unveills 64-core chip

Adapteva builds manycore processor that will deliver 70 gigaflops/watt

Tilera:

Tilera Releases 16-Core and 36-Core Processors for 64-bit Computing

KnuEdge:

KNUPATH Hermosa chip expected in first half of 2017 

Venray:

Designer of microprocessor-memory chip aims to topple memory and power wall

HPC System Vendors:

IBM:

IBM Power8 Systems

IBM Specs Out Blue Gene/Q Chip  

OpenPower systems coming in mid-2015

IBM first to 7nm process with working transistors

IBM's first OpenPOWER server targets HPC workloads

IBM's new open Linux Power servers take on x86 in HPC

BM launches POWER8 Systems, OpenPOWER roadmap

IBM begins Power9 rollout with backing frim DOE, Google

OpenPower9 ecosystem gains steam, new customers and more

HPE/SGI/CRAY:

HP scientists envision 10-teraflop many-core chip

SGI's Pangea recognized as industry's top commercial supercomputer on TOP500 list

ATOS:

Atos previews exascale-focused ARM-based Bull Sequena X1310

GENCI, CEA pave the way to exascale with Atos and Fujitsu's A64FX processor

Fujitsu:

Fujitsu targets 100 petaflop supercomputing

Oracle layoffs reportedly hit SPARC and Solaris hard

Fujitsu launches M12 servers; emphasizes commitment to Sparc

Cray, Fujitsu both bringing Fujitsu AFX64-based supercomputers to market in 2020

NEC:

NEC's vector supercomputer to power Japan's 'Next Earth Simulator'

Lenovo:

Lenovo gets serious about HPC

Lenovo aims high for systems expansion

IDC says Lenovo strengthens, IBM stumbles in Q1 2015 ranking

FPGAs:

Will 2015 be the year of the FPGA?

Making sense of when to use FPGAs

Why CTOs should reconsider FPGAs

Are FPGAs ready for the mainstream?

Revving up HPC workloads with FPGAs

Computing models for FPGA accelerators

Latest FPGAs show big gains in floating point performance

New open Intel FPGA stack eases development of custom platforms

HPC Accelerators:

The GPU Computing Era

The rise of GPU compute

OpenCL gains ground on CUDA

Supercomputing with Tesla GPUs

GPUs add up for ARM chips in HPC

Accelerating the development of HPC

A Tale of Two GPU Computing Models

The future of accelerator programming

GPUs and the future of parallel computing

GPUs and the future of parallel computing

Cray Unveils Its First GPU Supercomputer  

GPUs versus CPUs: Apples and Oranges?

AMD announces FLOP-Monster GPU card

HPC application support for GPU computing

Accelerated computing: a tipping point for HPC

Top 10 objections to GPU computing reconsidered

NCSA Director: GPU is the future of supercomputing

From Multithreaded Programming to GPU Computing

Accelerating Computational Science Symposium 2012

AMD courts HPC with 11.5 teraflops iInstinct MI100 GPU

Are supercomputing's elite turning backs on accelerators?

OpenCL: free your GPU ... and the rest of your system too!

Intel Xe-HP  GPU deployed for Aurora exascale development 

Startup launches manycore floating point acceleration technology

NEC to launch PCIe-based Vecor Engine targeting the SME market

Intel devuts oneAPI Gold and provides more details on GPU roadmap

Engineers boost computer processor performance by over 20 percent

Ten ways to fool the masses when giving performance results on GPUs

Retooling your program for accelerators and coprocessors? - keep these risks in mind

NVidia:

Nvidia Opens Up CUDA Compiler

Summary of 2015 NVidia GPU growth

NVidia pokes holes in Intel's many-core story

NVIDIA eyes post-CUDA era of GPU computing

NVidia steers roadmap around GPU bottlenecks

NVidia unveils 1.3 teraflop GPU for supercomputing

Nvidia announces  A100 80 GB GPU for AI supercomputing

NVIDIA Tegra processors blaze the way for ARM in supercomputing

Performance Analysis of a Hybrid MPI/CUDA Implementation of the NAS-LU Benchmark

AI Supercomputing:

ARM doubles down on AI

It's time to set industry standards for AI 

Cerebras Systems and NETL set new compute milestone

Further insight into the remarkable performance of Cerebras

Fujitsu-developed deep learning technology sets record on ABCI

Deep500 - researchers tackle an HPC benchmark for deep learning

Pushing the limit of molecular dynamics with ab initio  accuracy  to 100 million atoms with machine learning

Architectural alternatives:

Smarter caching

A blending of s:trengths

Smarter multicore chips

Computer games help HPC

We need more than multi-core

Attack of the killer micros redux

Modular HPC goes mainstream

HPC is dead and MPI is killing it

World's first 1,000 processor chip

Chip simulation for the 1000-core era

Scaleable agility for critical systems

Parallelism has crossed a threshold

Densifying assumed-sparse tensors

Application specific processor design

Overcoming hurdles to parallelisation

Gearing up for the cluster of tomorrow

The heterogenous programming jungle

Revisiting supercomputer architectures

The math on big NUMA versus clusters

A new breed of heterogenous computing

Multicore Is bad news for supercomputers

Achieving HPC without the supercomputer 

Massively multithreaded computer systems

A new golden age for computer architecture 

When dense matrix representations beat sparse

Hybrid-core: a better heterogeneous architecture

Better, faster systems with heterogenous designs

Processor whispers: about 16 and 17-core processors

Homemade CPUs on the way for local supercomputers

Tackling the co-design 3.0 puzzle - new thinking needed 

Stampede foreshadows heterogeneous supercomputing

IEEE group seeks to reinvent computing as scaling stalls

DARPA continues investment in post-Moore's technologies

Remapping computer circuitry to avert impending bottlenecks

Why 2016 is the most important year in HPC in over two decades 

Redefining the role of the CPU in the era of CPU-GPU integration       

Heterogeneous: the benefits to performance and power consumption

Memory-processing units (MPU) could bring memristors to the masses

How ASCI revolutionized the world of HPC and advanced modeling & simulation

Advancing the scalability and performance of I/O subsystems in multicore platforms

New parallel computing institute to advance high-performance computing research, education 

Studying the impact of hardware prefetching and bandwidth partitioning in chip-multiprocessors            

Shared-Memory & In-Memory Computing:
 
 
 
 
Exascale software:
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
Mixed Precision:

 
 
Personnel Recognition:
 
 
 
Obituaries:
 
 
 
 
 
 
 
 
 
Arcane: